The ability of the Model 935-P to provide constant-fraction timing on
fast, negative-polarity signals as narrow as 1 ns (FWHM) makes it
ideal for use with microchannel plates, fast photomultiplier tubes, fast
scintillators, and fast silicon detectors. The exceptionally low walk
delivered by the Model 935-P is vital in achieving the excellent time
resolution inherent in these fast detectors over a wide dynamic range of
pulse amplitudes. The Model 935-P can also be used with scintillators such
as NaI(Tl) which have long decay times. To prevent multiple triggering on
the long decay times, the width of the blocking output can be adjusted up
to 1 µs in duration.
The Model 935-P uses the constant-fraction timing technique to select a
timing point on each input pulse that is independent of pulse amplitude.
When properly adjusted, the generation of the output logic pulse
corresponds to the point on the leading edge of the input pulse where the
input pulse has risen to 20% of its maximum amplitude. To achieve this
constant-fraction triggering, the input pulse is inverted and delayed. The
delay time is selected by an external delay cable (DLY) to be equal to the
time taken for the input pulse to rise from 20% of maximum amplitude to
maximum amplitude. Simultaneously, the prompt input signal is attenuated
to 20% of its original amplitude. This attenuated signal is added to the
delayed and inverted signal to form a bipolar signal with a zero crossing.
The zero crossing occurs at the time when the inverted and delayed input
signal has risen to 20% of its maximum amplitude. The zero-crossing
discriminator in the Model 935 detects this point and generates the
corresponding timing output pulse.
"Walk" is the systematic error in detecting the time for the
20% fraction as a function of input pulse amplitude. Minimizing walk is
important when a wide range of pulse amplitudes must be used, because walk
contributes to the time resolution. The Model 935-P uses a patented
transformer technique for constant-fraction shaping to achieve the
exceptionally wide bandwidth essential for processing input signals with
sub-nanosecond rise times. As shown in Fig. 1, this results in a walk
guaranteed <±50ps and typically <±25 ps over a 100:1 dynamic
range of input pulse amplitudes. The patented shaping technique also
provides a zero-crossing monitor output that facilitates quick and
accurate walk adjustment, because it displays the full input signal
amplitude range.
The extremely short pulses from microchannel plate multipliers and
ultra-fast photomultiplier tubes require very short constant-fraction
shaping delays. To accommodate these detectors, the Model 935 incorporates
a selectable compensation for the inherent internal delay.
The Model 935-P includes a number of controls that considerably broaden
its utility. The threshold discriminator is useful for rejecting low-level
noise. A front-panel test point permits precise measurement of its setting
in the range from –20 to –1000 mV. Each channel provides three
bridged timing outputs. These are standard, fast negative NIM outputs. The
outputs can be selected to have either updating or blocking
characteristics. The updating mode is useful for reducing dead time in
overlap coincidence experiments. The blocking mode simultaneously
minimizes multiple triggering and dead time on scintillators with long
decay times. The output pulse width is adjustable from <4 ns to
>200 ns in the updating mode, and from <5 ns to
>1 µs in the blocking mode. The pulse-pair resolution is
<5 ns at minimum pulse width in the updating mode.
Switches on the printed circuit board allow selection of which channels
will respond to the front-panel fast-veto input. Additional fast gating
capability is provided by individual gate inputs for each channel on the
rear panel. The mode of these separate gate inputs can be individually
selected to be either coincidence or anticoincidence via DIP switches on
the printed circuit board. Each channel can also be programmed to ignore
or respond to the slow bin gate signal on pin 36 of the power connector
for NIM bins incorporating that signal.
The Model 935 contains four independent and identical constant-fraction
discriminators. Except where stated otherwise, the descriptions and
specifications are given for an individual channel, and apply to each of
the four channels.
| Performance |
|
|
|
Time
Slewing ("Walk") |
|
Guaranteed
<±50 ps (typically <±25ps) over a 100:1 dynamic range.
Measured under the following conditions: input pulse amplitude range
from 50 mV to 5 V, rise time <1 ns, pulse width
10 ns, external shaping delay approximately 1.6 ns
(33 cm or 13" of cable), internal offset delay enabled,
threshold approximately 20 mV. |
|
Constant
Fraction |
|
20% |
|
Pulse-Pair
Resolution |
|
<5 ns
in the updating mode, <7 ns in the blocking mode |
|
Maximum
Input/Output Rate |
|
Operates
at burst rates >200 MHz in the updating mode, and
>150 MHz in the blocking mode |
|
Operating
Temperature Range |
|
0
to 50°C |
|
Threshold
Temperature Sensitivity |
|
<0.01%/°C,
from 0 to 50°C. Threshold referenced to the –12 V supply
level supplied by the NIM bin |
|
Transmission
Delay |
|
Typically
<13 ns with 1.6 ns external delay |
|
Transmission
Delay Temperature Sensitivity |
|
<±10 ps/°C
from 0 to 50°C |
| Inputs |
|
|
|
N1, IN2, IN3,
and IN4 |
|
Front-panel
LEMO connector input on each channel accepts the fast linear signal
from a detector for constant-fraction timing. Linear range from 0 to
–10 V. Signal input impedance, 50 W,
DC-coupled; input protected with diode clamps at ±10 V. Input
reflections <10% for input rise times >2 ns. |
|
Gate
Inputs 1, 2, 3 and 4 |
|
Rear-panel
BNC connector for each channel accepts a negative, fast NIM logic
signal to gate the respective constant-fraction timing output.
Coincidence or anticoincidence gating is selected by a printed
wiring board DIP switch (See GATE COIN/ANTI). Input impedance,
50 W.
For proper gating operation, the leading edge of the GATE INPUT
should precede the IN1 (IN2, IN3, or IN4) signal by 1 ns and
have a width equal to the CF Shaping Delay plus 5 ns |
|
Veto |
|
Front-panel
LEMO connector accepts NIM negative fast logic pulses to inhibit the
timing outputs on all the channels chosen with the VETO YES/NO
switch. Input impedance, 50 W.
For proper FAST VETO operation, the leading edge of the VETO signal
must precede the IN1 (IN2, IN3, or IN4) signal by 3 ns and have
a width equal to the CF Shaping Delay plus 5 ns. |
|
Bin
Gate |
|
A
slow master gate signal enabled by the rear-panel B GATE ON/OFF
switch permits gating of the timing outputs when the Model 935 is
installed in a bin that provides a bin gate signal on pin 36 of the
NIM power connector. Clamping pin 36 to ground from +5 V inhibits
operation of all channels selected by the BIN GATE YES/NO switch |
| Outputs |
|
|
|
CF
Shaping Delay |
|
A
front-panel pair of LEMO connectors for selecting the required
constant-fraction shaping delay. A 50 W
cable is required. For triggering at a 20% fraction, the length of
the shaping delay is approximately equal to the time taken for the
input pulse to rise from 20% of its full amplitude to full amplitude |
|
CF
Monitor (M) |
|
Permits
observation of the constant-fraction shaped signal through a LEMO
connector on the front panel. Output impedance, 50 W,
AC coupled. The monitor output is attenuated by a factor of
approximately 5 with respect to the input when driving a terminated
50 W
cable |
|
Out |
|
Three
bridged, updating or blocking, fast negative NIM output signals,
furnished through front-panel LEMO connectors, mark the CF
zero-crossing time. Amplitude –800 mV on 50 W
load. Each output connector has its own 51 W
resistor in series with the common output driver |
|
Gnd |
|
Front-panel
test point provides a convenient ground connection for test probes |
| Power |
|
The
Model 9307-P derives its power from a NIM bin/power supply, such as
the Model 4001A-P and 4002D-P
combination. Required DC voltages and currents are: +12 V at
35 mA, +6 V at 70 mA, –6 V at 360 mA, and –12 V
at 100 mA. |
| Controls
& Indicators |
|
|
|
Threshold |
|
A
front-panel, 20-turn screwdriver adjustment for each discriminator
channel sets the minimum pulse amplitude that will produce a timing
output. Variable from –20 to –1000 mV. A front-panel test
point located to the left of the threshold adjustment monitors the
discriminator threshold setting. The test point voltage is 10X the
actual threshold setting. Output impedance: <2 kW. |
|
Walk
Adjustment (Z) |
|
A
front-panel, 20-turn screwdriver adjustment for fine-tuning the
zero-crossing discriminator threshold to achieve minimum walk.
Adjustable over a ±15 mV range. A front-panel test point
located to the left of the walk adjustment monitors the actual
setting of the zero-crossing discriminator. Output impedance, 1 kW |
|
Output Width
(W) |
|
A
front-panel, 20-turn screwdriver adjustment for each discriminator
channel sets the width of the three output logic pulses. The range
of width adjustment depends on the positions of jumpers W2 and W3 |
|
B Gate On/Off |
|
Rear-panel
switch turns the Bin Gate on or off for all channels programmed to
accept the Bin Gate |
|
Gate
Coin/Anti |
|
A printed
wiring board DIP switch selects either the coincidence or
anticoincidence mode for the individual channel's response to the
rear-panel gate input |
|
Veto Yes/No |
|
A printed
wiring board DIP switch selects whether or not an individual channel
will respond to the front-panel VETO input |
|
Bin Gate
Yes/No |
|
A printed
wiring board DIP switch selects whether or not an individual channel
will respond to the bin gate signal |
|
Internal
Offset Delay (W1) |
|
Printed
wiring board jumper W1 is normally omitted to enable the 1.7 ns
internal offset delay. This delay compensates for internal delays
and makes it possible to implement the very short shaping delays
required with 1-ns input pulse widths. With jumper W1 installed, the
minimum shaping delay is limited by a +0.7 ns internal
contribution. With W1 omitted, the internal delay contribution is
effectively –1.0 ns. The Model 935 is shipped from the
factory with the W1 jumper omitted. Spare jumpers for this position
are located in the storage area towards the rear of the module |
|
Updating/Blocking
Mode (W2) |
|
The printed
wiring board jumper W2 selects either the updating mode (U), or the
blocking mode (B) for the output pulse widths. In the blocking mode,
a second input pulse will generate no output pulse if it arrives
within the output pulse width W caused by a previous input pulse. In
the updating mode, a second input pulse arriving within the output
pulse width W from a previous pulse will extend the output pulse,
from the time of arrival, by a length W. The Model 935-P is shipped
from the factory in the updating mode |
|
Output Pulse
Width Range (W3) |
|
The printed
wiring board jumper W3 selects the range of output width adjustment
as listed in the table below. The Model 935-1 is shipped from the
factory with the W3 jumper omitted. Spare jumpers for this position
are located in the storage area towards the rear of the module.
W3
Jumper
Position |
Output
Pulse Width Adjustment Range |
W2
= U
Updating |
W2
= B
Blocking |
| Open |
<4
to >100 ns |
<5
to >100 ns |
| S |
<4
to >200 ns |
<5
to >200 ns |
| S + L |
Not
functional |
<30 ns
to >400 ns |
|
|
Event
Occurred LED |
|
Front-panel
LED for each channel indicates that an output signal has occurred. |
| Power |
|
The
Model 935 derives its power from a NIM bin/power supply. Required DC
voltages and currents are: +24 V at 0 mA; +12 V at 33 mA; +6 V at
225 mA; –6 V at 1400 mA; –12 V at 169 mA; –24 V at 55 mA. |
| Dimensions |
|
NIM-standard
single-width module, 34.3 mm x 221.3 mm (1.35" x
8.714") front panel per DOE/ER-0457T. |
| Weight |
Net |
|
1.1
kg (2.6 lb) |
|
Shipping |
|
2.0
kg (4.4 lb) |